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SUMMiT V™ Overview

The Sandia Ultra-planar, Multi-level MEMS Technology 5 (SUMMiT VTM) Fabrication Process is a five-layer polycrystalline silicon surface micromachining process (one ground plane/electrical interconnect layer and four mechanical layers).

Motivation
While the devices made possible by fabrication using the four-layer SUMMiTTM Process are truly complex, there is further benefit in providing yet another layer of mechanical polysilicon. For example, with the SUMMiT VTM Process, more advanced systems can be created on moveable platforms (Figure 1). Much taller devices can be made (up to 12 microns high), making possible greater stiffness and mechanical robustness in the devices (Figure 2). The additional height can also be used to increase the force produced by actuators (Figure 3). The design flexibility in a five-layer technology is truly enormous - devices for applications that have not yet been imagined are now a possibility.

Figure 1 Figure 2 Figure 3

Figure 1. Meshing gears on a moveable platform.

Figure 2. Laminated support springs containing only three mechanical layers result in more than 2 orders of magnitude greater out-of-plane stiffness in comparison to that of a single mechanical layer.

Figure 3. A laminated comb actuator results in nearly five times the electrostatic force of a single level actuator.

Fabrication
As with the SUMMiTTM Process, the SUMMiT VTM Fabrication Process is a batch fabrication process using conventional IC processing tools. Using this technology, high volume, low-cost production can be achieved. The processing challenges, including topography and film stress, are overcome using methods similar to those used in the SUMMiTTM Process: topography issues are mitigated by using Chemical-Mechanical Polishing (CMP) to achieve planarization, and stress is maintained at low levels using a proprietary process.

MEMS are also produced in the SUMMiT VTM Fabrication Process by alternately depositing a film, photolithographically patterning the film, and then performing chemical etching. By repeating this process with layers of silicon dioxide and polycrystalline silicon, extremely complex, inter-connected three-dimensional shapes can be formed. The photolithographic patterning is achieved with a series of two-dimensional "masks" that define the patterns to be etched. The SUMMiT VTM process uses 14 individual masks in the process, approximately the same quantity as in many CMOS IC processes.

Figure 4

Figure 4

Testimonials...
In relation to the SUMMiT V fabrication of a dual backplate capacitive MEMS Microphones, Dr. Toshi Nishida of the University of Florida said "We have developed a MEMS microphone using Sandia's Ultra-planar, Multi-level, MEMS Technology (SUMMiT V) fabrication process. The microphone is a dual backplate capacitive microphone that may be operated in either open loop or closed loop mode. electrostatic force feedback. The microphone consists of a diaphragm and two porous backplates, one on either side of the diaphragm. The SUMMiT V fabrication process is unique in that it can meet the fabrication requirements of this project. All five layers of polysilicon are used in the fabrication of this device; Poly 0 is used for electrical connections, Poly 1 and Poly 2 are combined to form the lower backplate, Poly 3 is used for the diaphragm, and Poly 4 is used for the top backplate. The SUMMiT V process provides compliant mechanical layers that are ideal for the construction of the microphone's diaphragm, especially due its use of chemical mechanical polishing to provide extremely flat structural layers and uniform spacing between the layers. The microphone demonstrates a flat frequency response, a linear response up to the designed limit, and a sensitivity which is close to the designed value. Sandia National Labs has been an essential partner in this project by providing access to and training for the SUMMiT V process."

Fairchild Semiconductor has said, The Summit™ technology is well recognized as the leading micromachining process for MEMS devices. "Network Photonics has worked with Sandia's Summit IV™ technology and found the process to be a stable, well-characterized, platform for producing MEMS-based optical switching solutions," said Andy Goldstein, vice president of engineering for Network Photonics. "This process meets the high levels of reliability and performance Network Photonics requires for its customers."
Fairchild is already in volume production of MEMS devices at its 6 inch wafer facility in South Portland. "We are pleased to see a company of Fairchild's stature become a provider of our Summit IV™ technology," said Jay Jakubczak, Sandia deputy director for Defense Programs Microsystems Application. "It has been a goal of our MEMS effort to make our technology available for broad commercial applications and the relationship with Fairchild is an important step in achieving that goal.

Sandia has been providing access to the Summit™ Technology through its SAMPLES | Prototyping program that supports small quantities of MEMS devices. Making the Summit™ processing technology available through Fairchild significantly increases the volume of MEMS devices that can be manufactured.

 

Sandia SUMMiT™ V MEMS Devices launched aboard NASA ST5 Micro-Sats
A constellation of 3 Micro-satellites were ejected at 3 minute intervals during a launch aboard a Pegasus XL rocket on 22 March, 2006. The spacecrafts' orbit is a "string of pearls," in a near-Earth polar elliptical orbit that will take them from approximately 300 kilometers (190 miles) to 4,500 kilometers (2,800 miles) from the Earth.

This was part of NASA's Space Technology 5 (ST5) mission to explore concepts of building and operating miniaturized micro-sats. ST5 is the first step in developing missions of tens or hundreds of small spacecraft that would look at phenomena such as space weather.

The ST5 micro-sats will explore the Earth's magnetic field using highly sensitive magnetometers, in addition to evaluating 10 technologies applicable to the development of micro-sats. One of the technologies being evaluated is Variable Emittance techniques for satellite thermal control which operates by either absorbing or reflecting heat. Two of the three satellites each contain 90 sq. cm of MEMS variable emittance louvers which were designed and fabricated at Sandia using the SUMMiT V™ (Sandia Ultra-planar, Multi-level MEMS Technology 5) MEMS fabrication technology. Sandia delivered the SUMMiT™ wafers to the Applied Physics Lab in fall 2001 for further processing and system integration as part of the joint development program with Johns Hopkins University Applied Physics Laboratory and NASA Goddard Spaceflight Center . The thermal performance of the variable emittance louvers will be evaluated during the 3 month mission.

"This is the first time a fully space-qualified device of this type has ever been flown, and the first to be flown on the outside of a satellite," says Ann Darrin, APL's Vari-E program manager, who explained that the devices underwent the same rigorous tests that all space products undergo prior to launch. "It's also the first demonstration of MEMS technology used to actively control temperature."


More Information:
John Hopkins Applied Physics Laboratory

Space Flight Now

 

 

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